1. Field of the Invention
The present invention relates generally to continuous time filters and specifically to fully integrated, high performance active filters.
2. Description of Related Art
Digitizing incoming composite video signals requires high-order anti-aliasing filters capable of handling large input voltage swings with minimal distortion. Compliance with CCIR 601 video standards requires such filters to have a magnitude response characterized by an equi-ripple passband gain that sharply rolls off into the stop band from approximately .omega..sub.o =5.5 MHz, as illustrated by the Bode plot of FIG. 1. This magnitude response may be implemented using a 5th order elliptic filter. Since 5th order elliptic filters cause an undesirable "peaking" in the video signal's group delay, as illustrated by line 1 in FIG. 2, a 3rd order Bessel filter having a group delay indicated by line 2 of FIG. 2 is cascaded with the elliptic filter, thereby compensating for this group delay peaking caused by the elliptic filter.
The transfer function T.sub.1 of a 5th order elliptic filter and the transfer function T.sub.2 of a 3rd order Bessel filter may each be expressed in terms of biaquadratic and integrating terms, where ##EQU1##
Discrete video filters which implement the 5th order elliptic transfer function T.sub.1 and the 3rd order Bessel transfer function T.sub.2 using passive components are well known. However, matching the discrete components therein with sufficient precision to comply with CCIR 601 video standards is very expensive and may be problematic. In addition, realizing such a high-order filter using discrete, passive components consumes an undesirably large amount of space.
The reduction of transfer functions T.sub.1 and T.sub.2 to products of biquadratic and integrating terms allows a video filter compliant with CCIR 601 standards to be implemented in silicon using transconductance-based active integrators. For instance, four conventional transconductors 10 and four capacitors 2C.sub.1, 2C.sub.2 may be configured as shown in FIG. 3 to implement a second order transfer function T.sub.3, where ##EQU2##
Referring now to FIG. 4, conventional transconductor 10 converts a differential voltage to a differential current which may then be integrated via one or more capacitors, as depicted for example in FIG. 3. An input differential voltage signal V.sub.i+ -V.sub.i- is provided at the bases of transistors Q1 and Q2, respectively. Transistors Q1 and Q2 are each biased by a current source I.sub.s. Diode-connected transistors Q3 and Q4 sink equal currents from the positive supply V.sub.cc in lines 11 and 12, respectively. The input voltage differential V.sub.i+ -V.sub.i- creates a voltage across resistor R.sub.E and thus causes a current I.sub.s +.DELTA.I to flow in the collector of transistor Q1 and a current I.sub.s -.DELTA.I to flow in the collector of transistor Q2. This current differential .DELTA.I is scaled via transistors Q5 and Q6 to provide an output current differential I.sub.o+, I.sub.o- at respective nodes 13 and 14. Transistors Q5 and Q6 are biased by a current source 2I.sub.b which may be varied to adjust the gain Gm of transconductor circuit 10, where ##EQU3##
The primary disadvantage of transconductor 10 results from the narrow range within which transconductor 10 converts voltage to current in a linear manner. The effective input impedance of transconductor 10 is proportional to the series resistance of resistor R.sub.E and the active resistances r.sub.e of transistors Q1 and Q2. Since r.sub.e varies with changes in input voltage, the gain Gm and thus the frequency response of transconductor 10 also changes with variations in the input signal V.sub.i. This dependence of r.sub.e upon input voltage variations, coupled with the limited voltage swing of the bases of transistors Q5 and Q6, results in transconductor 10 having a maximum peak-to-peak input signal swing of approximately 100 mV for a 5 V supply. Although larger signal swings may be possible by increasing the bias current I.sub.s, the resultant degradation of noise and dynamic range is unacceptable.
Since the peak-to-peak input voltage swing of a CCIR 601 compliant video filter implemented using transconductors 10 is also limited to approximately 100 mV, composite video signals must be attenuated before and then amplified after processing by such a video filter. This pre-filter attenuation and post-filter amplification degrades the differential phase and gain, and thus degrades the quality, of the composite video signal. Further, this undesirable need for pre-filter attenuation and post-filter amplification requires additional circuitry, thereby undesirably increasing circuit complexity and consuming more silicon real estate.
It may be impractical to fabricate both the video filter and the attenuation/amplification circuitry into a single chip. Accordingly, hybrid processes have typically been employed in which the passive filters and the filter amplification circuitry are fabricated as separate modules and then interconnected. Such hybrid processes are undesirable large and costly and, in addition, are not programmable.
Thus, a balancing between discrete components with a large input voltage swing and on-chip solution having limited voltage swing was necessary.